SDR Offset tuning can be implemented with differential shifts of the RF and baseband frequency parameters. One method to achieve receiver only offset tuning is what I call ‘indirect’ offset control. This approach implements an offset with a baseband DSP tuning option feature of a Frequency Xlating FFT Filter in a receiver DSP flow graph: Zero Frequency Receiver Artifact This approach to offset tuning is useful but limited to receiver only applications with a Frequency Xlating FFT filter in the flow graph.
It is possible to directly and separately tune the RFIC synthesizer and the FPGA NCO for both receiving and transmitting. This capability for offset tuning is useful for some applications: removing baseband artifacts, split frequency, and dual transceiver operation: Dual Transceiver Application This technique provides simplified direct control of the frequency offset and avoids the need for ‘indirect’ control via DSP flow graph adjustment. All of the tuning occurs directly at the RF synthesizer and FPGA level with Python commands in the Source and Sink Center Freq parameter fields..
To get started, it is useful review modern SDR architecture: Modern SDR Architecture and focus on the special purpose RFIC and the FPGA. The RFIC contains an independent RF frequency synthesizer. The FPGA contains it’s own synthesizer termed a ‘Numerically Controlled Oscillator’ (NCO). Each synthesizer can be tuned directly and separately with the proper frequency commands. The RFIC synthesizer outputs at RF. The NCO only outputs baseband frequencies which limits potential offsets to less than 1/2 the SDR clock frequency.
Below are a series of USRP Sink Properties boxes that illustrate the Python command syntax and supplementary tuning control functionality for a SDR transmitter.
Note: The location of the ‘tune’ command in the Sink Center Freq parameter field determines whether the ‘tune’ command in the Sink Center Freq parameter field determines the RFIC synthesizer frequency. The FPGA NCO cannot be tuned with a variable parameter.
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